The present invention relates to a semiconductor device. More particularly, the present invention relates to a semiconductor device including a capacitor and a method of fabricating the same.
As semiconductor devices such as a Dynamic Random Access Memory (DRAM) become highly integrated, the cell area is reduced. The reduction of the cell area decreases an area of a cell capacitor. However, the capacitance is required to be more than 25 fF so that the DRAM may be normally operated taking into consideration read-out of the cell, soft errors from alpha particles and a sensing margin of a sense amplifier. The capacitance is proportional to the surface of the electrode and a dielectric constant of a dielectric material that exists between electrodes. However, it is difficult to find out a dielectric material having a high dielectric constant which does not generate a leakage current. As a result, it is necessary to increase the surface of the storage node for highly integrated DRAM.
A DRAM cell comprises of a capacitor for storing charges that represent information and a transistor for addressing charges stored in the capacitor. The transistor formed over a semiconductor substrate includes a gate electrode to control a current flowing between source/drain regions. The charges stored in the capacitor are accessed through the transistor. The capacitance means a capacity of charges stored in the capacitor. As the capacitance is increased, more charge can be stored. The capacitance is represented by followed Equation 1.
                    C        =                  ɛ          ⁢                                          ⁢                      A            d                                              equation        ⁢                                  ⁢        1            where ∈ is a dielectric constant determined by the types of dielectric films disposed between two electrodes, d is a distance between the two electrodes, and A is an effective surface of the two electrodes. Referring to Equation 1, the capacitance can be increased by making ∈ larger, d smaller, or area A larger. Accordingly, the electrode of the capacitor has been provided with a three-dimensional configuration, e.g., a concave structure or a cylinder structure, to increase the effective area of the electrode.
The capacitor having a concave structure includes a hole where an electrode of the capacitor is formed in an interlayer insulating film, a lower electrode of the capacitor is formed in the inner surface of the hole, and a dielectric film and an upper electrode are deposited over the lower electrode. Due to high integration in semiconductor devices, it is difficult to secure a capacitance required in each cell in the limited cell area even with the capacitor having a concave structure. As a result, a capacitor having a cylinder structure has been suggested to provide a larger surface area than that of the capacitor having a concave structure.
The capacitor having a cylinder structure includes a hole where an electrode of the capacitor is formed in an interlayer insulating film, a lower electrode of the capacitor is formed in the inner surface of the hole, the interlayer insulating film is removed, and a dielectric film and an upper electrode are deposited over the residual lower electrode. In the capacitor having a cylinder structure, inner and outer surfaces of the lower electrode can be used as an effective surface of the capacitor to have a larger capacitance than that of the capacitor having a concave structure. As a result, a dip-out process is required when the capacitor having a cylinder structure is formed.
However, the dip-out process is performed by a wet method including a chemical solution. The chemical solution causes leaning and collapse of the lower electrode for storage node. When the lower electrode has a large aspect ratio due to high integration of the semiconductor device, the leaning and collapse of the lower electrode results in degradation of the device.